1. Field of the Invention
The present invention relates to a thin film transistor, and more particularly, to an organic semiconductor thin film transistor and a method of fabricating the same.
2. Discussion of the Related Art
As the information age progresses, flat panel display (FPD) devices having the characteristics of light weight, thin profile, and low power consumption are being developed. Such FPD devices are commonly substituted for cathode ray tube (CRT) devices. Display devices are often classified according to their ability for self-emission as either emissive display devices or non-emissive display devices. Emissive display devices display images by taking advantage of their ability to self-emit light, while non-emissive display devices require a light source since they do not themselves emit light. For example, plasma display panel (PDP) devices, field emission display (FED) devices, and electroluminescent display (ELD) devices are examples of the emissive display devices. Liquid crystal display (LCD) devices are non-emissive display devices and are commonly used in notebook and desktop computers because of their high resolution, color rendering capability, and high quality image display.
One type of LCD device is the active matrix type LCD device in which a plurality of pixels are arranged in a matrix, and switching devices such as an independently controllable thin film transistor (TFT) are provided in each pixel of the matrix. For example, an active matrix type LCD device utilized for the screen of a notebook, a television, a monitor or the like includes first and second substrates facing each other and a liquid crystal layer interposed between the substrates. The first substrate (or array substrate) includes a plurality of gate lines and a plurality of data lines crossing each other to define a plurality of pixel regions. Further, a plurality of TFTs are disposed at the crossings of the plurality of gate lines and the plurality of data lines, wherein each of the plurality of TFTs corresponds to one of the plurality of pixel regions and is connected to each of a plurality of pixel electrodes formed in the plurality of pixel regions.
FIG. 1 is an exploded perspective view of an LCD device according to the related art. As shown in FIG. 1, an LCD device 20 has an upper substrate 22 having a black matrix 25, a color filter layer 26 and a common electrode 28 on the color filter layer 26. The color filter layer 26 includes red, green and blue color filters 26a, 26b and 26c. The LCD device also includes a lower substrate 10 having a thin film transistor (TFT) Tr and a pixel electrode 18 connected to the TFT Tr. A liquid crystal layer 30 is interposed between the upper and lower substrates 22 and 10. The lower substrate 10 is often referred to as an array substrate because array lines, including gate lines 14 and data lines 16 are formed thereon. The gate lines 14 and the data lines 16 cross each other, and the TFTs Tr are switching elements formed in the matrix that are connected to the gate lines 14 and the data lines 16. The gate lines 14 and the data lines 16 cross each other to define pixel regions P. Each TFT Tr is formed at crossing of one of the gate lines 14 and one of the data lines 16. The pixel electrodes 18 are formed of a transparent conductive material in each of the pixel regions P. The upper substrate 22 is often referred to as a color filter substrate because the color filter layer 26 is formed thereon.
The upper and lower substrates 22 and 10 are attached with a seal pattern (not shown) through a liquid crystal cell process. The seal pattern keeps a cell gap of the LCD device 20 uniform and prevents liquid crystal materials in the space between the upper and lower substrates 22 and 10 from leaking. Although not shown, upper and lower alignment layers are respectively formed between the upper substrate 20 and the liquid crystal layer 30 and the lower substrate 10 and the liquid crystal layer 30. The upper and lower alignment layers can improve alignment reliability of the liquid crystal layer 30. In addition, the LCD device 20 includes at least one polarizer (not shown) on or under an outside surface thereof, and a backlight unit (not shown) may be disposed under the LCD device 20 as a light source.
An image signal transmitted by the data line 16 is applied to a predetermined pixel electrode 18 by sequentially scanning ON/OFF signals to the gate line 14 of the TFT Tr. Hence, the liquid crystal layer 30 is driven by a vertical electric field between the pixel electrode 18 and the common electrode 28 such that light transmittance through the liquid crystal layer 30 changes. Thus, when a plurality of image signals are transmitted on the data line 16, images are displayed based on the change of light transmittance through the matrix of pixels P.
The base substrate of the LCD device has been typically made of a transparent glass substrate. Recently, a plastic substrate, which is lighter and more flexible than the glass substrate, has been suggested as a base substrate of the LCD device for small portable display devices, such as notebook computers and personal digital assistants (PDA). However, the plastic substrate is more susceptible to heat and chemical treatment than the glass substrate. Thus, a plastic substrate can not be used as the base substrate for an LCD device because the process of manufacturing the array elements on the array substrate is usually performed under a temperature higher than about 200 degrees Celsius. Further, several such high temperature processes are performed when manufacturing the array substrate. Therefore, a color filter substrate that does not have any array elements may be made of plastic, but a glass substrate should be used for the array substrate.
Another solution is to use a small molecule organic material and apply a low temperature process less than about 200 degrees Celsius to form array elements so that the flexible plastic substrate can be used for manufacturing the array substrate. Hereinafter, a method of fabricating the array substrate of the LCD device using a flexible plastic substrate at a low temperature of less than about 200 degrees Celsius will be described. Although a metal layer, an insulating material layer and a passivation layer are not affected by the low temperature process, a semiconductor layer including a channel region of the thin film transistor is affected. More particularly, when a semiconductor material, such as silicon is form under a low temperature process, electrical characteristics of the thin film transistor will be affected because the semiconductor layer has a weak inner structure due to the low temperature process and conductivity of the semiconductor layer is reduced in comparison to a semiconductor layer formed under a higher temperature process.
To solve such problems, the semiconductor layer is made of an organic semiconductor material, wherein the organic semiconductor material includes a small molecule organic semiconductor material and a polymer organic semiconductor material. Here, the small molecule organic semiconductor material has higher conductivity than the polymer organic semiconductor material. However, the small molecule organic semiconductor material is very weak against an organic solvent or alcohol. Therefore, it is difficult to utilize the small molecule organic semiconductor material in the fabrication of a TFT.
FIG. 2 is a schematic cross-sectional view of a first bottom gate type TFT formed of an organic semiconductor material according to the related art. As shown in FIG. 2, a gate electrode 43 is formed on a substrate 40. A gate insulating layer 47 is formed over the entire surface of the substrate 40, including where the gate electrode 43 is formed thereon. A source electrode 50 and a drain electrode 53 are formed on the gate insulating layer 47 with a space 52 between the source electrode 50 and the drain electrode 53. Further, an organic semiconductor layer 57 is formed on the source electrode 50, the drain electrode 53 and in the space 52. The gate electrode 43, the source electrode 50, the drain electrode 53 and the organic semiconductor layer 57 constitute a TFT Tr.
When the small molecule organic semiconductor material is utilized as a semiconductor layer in a TFT according to the related art, a gate electrode is formed on the substrate (i.e., a bottom gate type TFT structure), a gate insulating layer is on the gate electrode, a source electrode and a drain electrode is on the gate insulating layer, and an organic semiconductor layer of the small molecule organic semiconductor is on the source electrode and the drain electrode. Accordingly, the bottom surface of the organic semiconductor layer directly contacts the top surfaces of the source electrode and the drain electrode to prevent the organic semiconductor layer from being damaged by the an organic solvent or alcohol, such as from a developer or an etchant. This structure is often referred to as a bottom contact type channel layer. However, the bottom contact type channel layer has a problem in that it is difficult to inject charges due to increase of the contact resistance between the organic semiconductor layer and the source/drain electrodes. As a result, mobility thereof is reduced, thereby reducing the device speed of the TFT.
FIG. 3 is a schematic cross-sectional view of another bottom gate type TFT formed of an organic semiconductor material according to the related art. As shown in FIG. 3, a gate electrode 73 is formed on a substrate 70. A gate insulating layer 75 is formed over the entire surface of the substrate 70, including where the gate electrode 73 is formed thereon. An organic semiconductor layer 78 is formed on the gate insulating layer 75 in a region covering the gate electrode 73. A source electrode 80 and a drain electrode 82 with a space 81 therebetween are formed on the substrate 70 where the organic semiconductor layer 78 is formed thereon. The space 81 corresponds to the gate electrode 73. The gate electrode 73, the organic semiconductor layer 78, the source electrode 80 and the drain electrode 82 constitute a TFT Tr.
Typically, the source electrode 80 and the drain electrode 82 are patterned using a shadow mask 92, which includes a shielded region (not shown) and an opened region (not shown), after forming the organic semiconductor layer 78. Accordingly, when the TFT Tr is formed as the bottom gate type TFT with a top contact type channel layer, operation of the TFT Tr is relatively good. However, when the organic semiconductor layer 78 may is exposed to an organic solvent or alcohol, its semiconductor capabilities are rapidly degraded. A distance d1 of the space 81 or channel length has a value of more than several tens of micrometers due to a physical limitation of the process using the shadow mask 92. Therefore, an aperture ratio and a resolution of the device having the TFT Tr may be reduced corresponding to the size increase of the TFT Tr.
To solve such problems, a top gate type TFT has been suggested. When the top gate type TFT is adopted, a polymer organic semiconductor material has been used as an organic semiconductor material. However, most polymer organic are semiconductor materials form amorphous thin-films which provide undesirable electrical characteristics. Further, such a structure creates another problem in which the polymer organic semiconductor layer on an organic insulating layer as a gate insulating layer can be damaged during fabrication process.